| 摘要 |
<p>In a DMA controller in accordance with the present invention, in the case of memory-to-memory data transfer using the DMA process (transfer for changing addresses inside the memory), one channel for carrying out the data transfer is provided. In the case of data transfer between the I/O device and a memory using the DMA process, two channels for carrying out the data transfer are, on the other hand, provided by using a circuit that constitutes said one channel. Thus, it is possible to provide multiple channels in the DMA controller by using a compact, inexpensive circuit construction. <IMAGE></p> |
