发明名称 SHIRIARU*DEJITARU*BIDEO*DEETANOERAAKENSHUTSUSOCHI
摘要 <p>A method of detecting bit errors in serial digital video uses a digital demodulator to process a parallel video data signal derived from the serial digital video. The output of the demodulator is converted to analog, lowpass filtered, squared and compared with a threshold value. The result of the comparison produces an error signal when bit errors occur. The bit errors may be counted over a predetermined time period, may be used to switch a data filter into the video data output path to conceal the bit errors, and may be used to map the bit errors to a display for visualization of the location of the errors within a video image represented by the serial digital video.</p>
申请公布号 JP2657351(B2) 申请公布日期 1997.09.24
申请号 JP19930247541 申请日期 1993.09.08
申请人 TEKUTORONITSUKUSU INC 发明人 DANIERU JII BEIKAA
分类号 H04N5/92;G11B20/18;H04N5/945;H04N7/24;H04N17/00;H04N19/89;H04N21/2383;H04N21/438;(IPC1-7):G11B20/18 主分类号 H04N5/92
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