发明名称 |
Sectorized electrically erasable and programmable non-volatile memory device with redundancy |
摘要 |
<p>A sectorized electrically erasable and programmable non-volatile memory device comprises: a plurality of individually-addressable memory sectors (S1-S8), each memory sector comprising an array of memory cells (MC) arranged in rows (WL0-WL255) and columns (BL0-BL255); redundancy columns (RBL0-RBL3) of redundancy memory cells (RMC) for replacing defective columns of memory cells; and a redundancy control circuit (CAM1-CAM4,5-7,12) for storing addresses of the defective columns and activating respective redundancy columns when said defective columns are addressed. Each memory sector comprises at least one respective redundancy column (RBL0-RBL3). The redundancy control circuit comprises at least one memory means (CAM1-CAM4) comprising individually addressable memory locations each one associated to a respective memory sector for storing, individually for each memory sector, addresses of a defective column belonging to the memory sector, and an address recognition means (5,6,7) associated to said memory means for recognizing if a current address supplied to the memory device coincides with a defective column address stored in an addressed one of said memory locations associated to a currently addressed memory sector. <IMAGE></p> |
申请公布号 |
EP0797145(A1) |
申请公布日期 |
1997.09.24 |
申请号 |
EP19960830144 |
申请日期 |
1996.03.22 |
申请人 |
STMICROELECTRONICS S.R.L. |
发明人 |
VILLA, CORRADO;DALLABORA, MARCO;TASSAN CASER, FABIO |
分类号 |
G11C16/06;G11C29/00;G11C29/04;(IPC1-7):G06F11/20 |
主分类号 |
G11C16/06 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|