发明名称 HEIRETSUNTENCHOKURYUDENGENSOCHINOSENTAKUSHADANKAIRO
摘要 PURPOSE:To intercept a faulty circuit with high speed by a method wherein the output voltage of a current detecting circuit, inserted into a negative side, is compared with a reference voltage and a MOS-FET, connected to the negative side, is controlled with electricity is supplied to one load by parallel DC power sources. CONSTITUTION:DC power is supplied to a common load L by a plurality of DC power sources A, B. The output voltage V0 of a current detecting circuit DI, connected to negative side, is compared with a reference voltage Vr by a comparator CV. When V0>Vr, the comparator CV outputs a level H to put a MOS-FET transistor(Tr) ON. When the current is small and/or a DC power source is troubled and the current is about to flow in reverse direction, it becomes V0<Vr and the comparator CV outputs a level L whereby the MOS- FET.Tr is put OFF. According to this method, a faulty circuit may be intercepted quickly.
申请公布号 JP2657690(B2) 申请公布日期 1997.09.24
申请号 JP19890008650 申请日期 1989.01.19
申请人 SHINDENGEN KOGYO KK;NIPPON DENSHIN DENWA KK;ORIJIN DENKI KK 发明人 KIKUCHI YOSHIHIKO;OZU KYOTSUGU;OOHASHI YASUO;KUWATA YUTAKA;SUZUKI YOSHIO;ITO MIKIO
分类号 H02J9/06;H02J1/10 主分类号 H02J9/06
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