发明名称 Process for making integrated circuit structure comprising local area interconnects formed over semiconductor substrate by selective deposition on seed layer in patterned trench
摘要 A local area interconnect structure comprising one or more electrically conductive interconnects formed from electrically conductive metal compounds is described and a process for forming same. Electrically conductive metal compounds are selectively deposited in one or more trenches which were previously formed in an insulation layer in a configuration conforming to the desired pattern of the electrically conductive interconnects. A seed layer is first selectively formed on surfaces of the trenches and the electrically conductive metal compound is then selectively deposited over the seed layer in the trench, but not on the exposed surfaces of the insulation layer.
申请公布号 US5670425(A) 申请公布日期 1997.09.23
申请号 US19950552461 申请日期 1995.11.09
申请人 LSI LOGIC CORPORATION 发明人 SCHINELLA, RICHARD;SANGANERIA, MAHESH K.
分类号 H01L21/768;(IPC1-7):H01L21/441 主分类号 H01L21/768
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