| 摘要 |
An electrically erasable and programmable read-only semiconductor memory includes a cell array portion formed by arranging in matrix a plurality of memory cell portions each having a cell transistor, a unit for selecting a cell transistor of the cell array portion, and a read circuit for generating a plurality of data, for each of a plurality of reference current values, for indicating whether or not a current value of a current flowing through a cell transistor selected and brought into a read state is greater than a plurality of reference current values inclusive of reference current values of the case where judgement is made as to whether the cell transistor brought into the read state is under the state where the cell transistor should be regarded as storing a first logical value, or under the state where the cell transistor should be regarded as storing a second logical value. This construction can detect in advance a cell transistor having the possibility of the loss of information, and acquires the chance for rewrite or the exchange of the cell transistor used. Accordingly, the loss of the information can be prevented and system reliability can be improved.
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