MULTIPHASE CLOCK SIGNAL GENERATION CIRCUIT AND ANALOG/ DIGITAL CONVERTER

摘要

PROBLEM TO BE SOLVED: To compensate the deterioration of characteristics of all A/D(analog/ digital) converters that are caused by mismatching of characteristics of these A/D converters by controlling the different phases of clock signals based on the control signal received from the outside. SOLUTION: A multiphase clock signal generation circuit 30 supplies the clock signals having the phases different from each other by 2yc /N to terminals S1 to S4 of a multiplex unit 6 and also to the sampling/holding circuits 1 to 4 respectively. A switch circuit 10 controls the phases of those clock signals based on an external control signal cntr1 via a means that can optionally switch the phases which are supplied to the terminals S1 to S4 and the circuits 1 to 4. Thus it is possible to reduce the deterioration of characteristics of all A/D converters that are caused by mismatching of characteristics occurring among the circuits 1 to 4 and the A/D converters 11 to 14 by changing the interleave sequence.