发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT EQUIPMENT AND METHOD FOR MANUFACTURING THE SAME
摘要 PROBLEM TO BE SOLVED: To prevent flow of wiring caused by non fiat substrate during reflow of inter-level insulating film in semiconductor integrated circuit equipment with multilayer interconnection. SOLUTION: In a DRAM, wirings 37, 38 and 39 are formed on a bit line BL through a BPSG film 36. A wiring 43 is formed on the wirings 37, 38 and 39 through a BPSG film 42. A dummy wiring 10 formed by the same process as the bit line BL is placed on the lower level adjacent to a memory array. The wirings 37, 38 and 39 are prevented from flowing toward the lower level by a further reflow of the BPSG film 36 at the time of the reflow of the BPSG film 42.
申请公布号 JPH09252002(A) 申请公布日期 1997.09.22
申请号 JP19960060501 申请日期 1996.03.18
申请人 HITACHI LTD;HITACHI HOKKAI SEMICONDUCTOR LTD 发明人 SAWADA TOMOHIRO;IKENAGA SHINICHI;SUWAUCHI NAOKATSU;FUJIOKA YASUHIDE
分类号 H01L21/3205;H01L21/768;H01L21/8242;H01L23/52;H01L27/108 主分类号 H01L21/3205
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