发明名称 PHASE LOCKED LOOP CIRCUIT
摘要 PROBLEM TO BE SOLVED: To obtain a phase locked loop circuit in which no phase jump is caused for an output phase synchronizing signal in the case of switching a reference signal for phase locking and no out of frame synchronism is caused in an opposite device. SOLUTION: When a reference signal switching circuit selects a new reference signal from a reference input terminal 1a, phase locking control is stopped by a free run control signal 5 to cause free running. Thus, tri-state buffers 13a, 13b of a charge pump 6 reach a high impedance state, then an output level of the charge pump 6 is given by resistors 14a, 14b and a voltage controlled oscillator 9 outputs a frequency in the vicinity of the frequency substantially to be synchronized. In this case, since no phase lock control is conducted strictly, a phase of an output phase locking signal is slowly changed and the phase locking control is restarted when the phase of the output phase synchronizing signal is closer to the phase of the new reference signal.
申请公布号 JPH09252250(A) 申请公布日期 1997.09.22
申请号 JP19960060985 申请日期 1996.03.18
申请人 MITSUBISHI ELECTRIC CORP 发明人 TAKAHASHI AKIRA;SUGANO NORIO
分类号 H03L7/18;H03L7/08;H03L7/10 主分类号 H03L7/18
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