发明名称 |
INTER-PROCESSOR DATA TRANSFER SYSTEM FOR PARALLEL COMPUTER SYSTEM |
摘要 |
PROBLEM TO BE SOLVED: To provide an inter-processor data transfer system which can designate a body storage area via a receiving processor in a parallel computer system where plural processors are connected to a switch circuit and a transmitting processor transmits a packet header to the switch circuit to send the header and the body data to the receiving processor via the switch circuit. SOLUTION: The selection information is added into a packet header 2 to decide an address designated in the header 2 or a message area 3a designated by a receiving processor PE as an area where the body data 3 corresponding to the header 2 are stored. The processor PE contains a selection means to select the storage position of the data 3 and switches this selection means based on the selection information on the header 2 to store the data 3 in the address designated by a transmitting processor or the area 3a designated by the processor PE. |
申请公布号 |
JPH09251445(A) |
申请公布日期 |
1997.09.22 |
申请号 |
JP19960060535 |
申请日期 |
1996.03.18 |
申请人 |
FUJITSU LTD |
发明人 |
AMADA TADAO;ONO MASAHITO;OTA MASATO;IKEDA MASAYUKI;SHINJO NAOKI;KOBAYAKAWA KAZUE |
分类号 |
G06F15/173;G06F15/163 |
主分类号 |
G06F15/173 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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