IMAGE MEMORY ACCESS SYSTEM FOR DCT ARITHMETIC

摘要

PROBLEM TO BE SOLVED: To accelerate access to the image memory of a processor for DCT arithmetic. SOLUTION: This system consists of the processor for DCT arithmetic 1, the image memory 2 divide-constituted into the block of even numbered and the block of odd numbered by the unit of 8×8 block, a DRAM control circuit 3 generating a DRAM control signal capable of simultaneously reading the picture blocks of even numbered and odd numbered to the image memory 2, a cache memory 4 storable a single 8×8 block, and a cache memory control circuit 5 controlling the cache memory 4. Then at the same time of the even numbered picture block reading operation of the processor for DCT arithmetic 1, the odd numbered picture block next to it is written in the cache memory 4 and the reading operation of the odd numbered picture block of the next processor for DCT arithmetic 1 is executed from the cache memory 4.