发明名称 BARREL SHIFT ARITHMETIC UNIT
摘要 PROBLEM TO BE SOLVED: To process a barrel shift fast by composing a carry register of a variable length register which varies in bit length with the shift bit number included in a shift instruction according to information from an instruction decoder. SOLUTION: This unit is equipped with a barrel shift arithmetic part 1 which makes plural bit shifts in one cycle and the carry register 3 which stores data overflowing from the arithmetic part 1, and the carry register 3 is composed of the variable length register which varies in bit length with the shift bit number includes in the shift instruction. When a barrel shift of data which is longer than the bit length of the barrel shift arithmetic part 1 is made, (n)-bit data overflowing from the barrel shift arithmetic part 1 as a result of the barrel shift operation of a divided bit group is stored in the variable length carry register 3 having changed to (n)-bit length and used as it is for the barrel shift operation of a next bit group. Thus, the barrel shift operation can be completed through a small number of steps.
申请公布号 JPH09244872(A) 申请公布日期 1997.09.19
申请号 JP19960046461 申请日期 1996.03.04
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SHIMOI YASUYOSHI;KONO KAZUHIKO
分类号 G06F7/00;G06F7/76 主分类号 G06F7/00
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