PROCESS AND DEVICE FOR GENERATING A PLURALITY OF DERIVED CLOCK SIGNALS

摘要

A process and devices are disclosed for deriving a plurality of clock signals from a single input clock signal for signal processing circuits, in particular for a digital modem. The derived clock signals are generated from an output signal of an accumulator which has a predetermined bit density n and which increments the clock of the input clock signal each time by one unit and thus carries out a modulo2 operation.