| 摘要 |
<p>A clock signal generated from a timer (4) is outputted to an interruption controller (7) and a dedicated CPU (2). When the clock signal is inputted while the CPU (2) is executing a specific arithmetic processing, the CPU (2) stops the processing and causes a main CPU (1) to return to an operating state from a hold state. Namely, the CPU (2) returns the control to the main CPU (1) at every period (500 νs) of the clock signal even while the CPU (2) is in the execution of arithmetic processing. Moreover, the period of the clock signal is shorter than the time interval of data transferring interruption requests from a serial controller (3). Hence data can be transferred to a memory without any DMA controller which has been conventionally used, and the cost of a programmable controller can be reduced.</p> |
