发明名称 |
CIRCUIT ARRANGEMENT WITH A FILTER QUADRIPOLE |
摘要 |
A description is given of a circuit arrangement comprising a filter quadripole having two output terminals; and a voltage follower circuit having two terminals, said terminals having identical electric potentials when the voltage follower circuit is in its turned-on state, each of the terminals of the voltage follower circuit being connected to one of the output terminals of the filter quadripole respectively, and the voltage follower circuit only being in its turned-on state during the turn-on time interval of the circuit arrangement. This circuit arrangement is suitable for a receiver circuit, more particularly, for a pager and has a very brief turn-on time. |
申请公布号 |
WO9733379(A2) |
申请公布日期 |
1997.09.12 |
申请号 |
WO1997IB00199 |
申请日期 |
1997.03.05 |
申请人 |
PHILIPS ELECTRONICS N.V.;PHILIPS PATENTVERWALTUNG GMBH;PHILIPS NORDEN AB |
发明人 |
DICK, BURKHARD;BIEHL, MANFRED;JANSEN, WINFRIED;PILLE, BERND;WIRGES, NORBERT |
分类号 |
H03H11/04;H04B1/16 |
主分类号 |
H03H11/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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