发明名称 MULTILAYERED WIRING SUBSTRATE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To inspect presence or absence of troubles in an inner conductive pattern layer within a short period. SOLUTION: In a multilayer wiring substrate 61 in which conductive pattern layers 63 to 68 of six layers are stacked via insulation layers 71 to 75, an inspecting via hole 93 connecting with a conductor of an inner conductive pattern layer is formed. The inspecting via hole 93 is a blind via hole of which one end part is exposed to a face of the substrate. A wiring circuit of the substrate 61 is divided into two parts with another end part of a conductor 90 connecting with the via hole 93 being used as a boundary, and continuity test is performed every wiring circuit portion. In these divided wiring circuit portions, via the end part of the wiring circuit and the inspecting via hole 93, electric signals are individually applied from at least one of one face 78 and the other face 79 of the substrate 61 without breaking the substrate 61, so that the conductive inspection can be performed.
申请公布号 JPH09237975(A) 申请公布日期 1997.09.09
申请号 JP19960041791 申请日期 1996.02.28
申请人 SHARP CORP 发明人 KANAI TAKESHI
分类号 H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K3/46
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