| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device having a pad layout and a lead layout capable of coping with the reduction of chip size, the multiplication of package pins, and the narrowing of pitch due to higher integration and higher function. SOLUTION: A plurality of columns of pads 12-1, 12-2 are formed on a semiconductor chip 11, and they are arranged with their pitches in different columns being shifted from each other. Because the pads are divided and arranged into a plurality of columns, they can easily cope with the reduction of chip size, the multiplication of package pins, and the narrowing of pitch, and because a plurality of columns of pads are shifted and arranged, leads can be arranged on any of one side, opposite two sides, three sides, or four sides of the chip when wire bonding is carried out so that degree of freedom for a lead layout of a package can be made higher. Further, a probe can be applied from one side of the chip during the probing of the chip in a wafer state so that a simultaneous test of a plurality of chips is made possible. |
