发明名称 COMPUTER SYSTEM
摘要 <p>PROBLEM TO BE SOLVED: To provide a computer system whereby bus connection with an extension unit is made to be possible when the bus cycle of a computer mainbody is in an execution state. SOLUTION: An analog switch(S) is permitted to intervene in bus signal lines 2 derived at an extension unit 30 side. When the bus signal lines 2 at the extension unit 30 side are pulled-up, a maximal value (high value) is transmitted to the bus signal lines 2 and the minimal value (low value) is transmitted at the time of being pulled-down. Then, after the potential levels of both buses become equal by the transmission of the maximal value or the minimal value, a connection control gate array 23 turns on the analog switch (S). Thus, both bus signal lines are connected without causing a transient phenomenon even when the bus cycle is in the execution state.</p>
申请公布号 JPH09237140(A) 申请公布日期 1997.09.09
申请号 JP19960044920 申请日期 1996.03.01
申请人 TOSHIBA CORP 发明人 NISHIGAKI NOBUTAKA;NAKAMURA NOBUTAKA
分类号 G06F1/18;G06F3/00;G06F13/40;(IPC1-7):G06F3/00 主分类号 G06F1/18
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