| 摘要 |
PROBLEM TO BE SOLVED: To warrant cell transfer delay fluctuation within a requirement of the cell transfer delay fluctuation of an asynchronous transfer mode ATM channel independently of the quantity of a phase difference between an active system and a standby system. SOLUTION: A phase comparator circuit 4 detects a phase difference between a 0 system transmission line 1 and a 1 system transmission line based on a switching trigger cell sent through the 0 system transmission line 1 and the 1 system transmission line. A first-in first-out FIFO control circuit 1 decides the number of user cells to be stored in a FIFO memory 8 based on phase information from the phase comparator circuit 4 and an external allowable CDV and controls a read timing of the user cell from the FIFO memory 8. An output selection circuit 9 selects an input from the 0 system transmission line 1 and the 1 system transmission line or the output of the FIFO memory 8 and provides an output.
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