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发明名称
LAYOUT COMPRESSING METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要
申请公布号
JPH09232432(A)
申请公布日期
1997.09.05
申请号
JP19960040897
申请日期
1996.02.28
申请人
MATSUSHITA ELECTRON CORP
发明人
KURODA HIROYO
分类号
H01L21/82;(IPC1-7):H01L21/82
主分类号
H01L21/82
代理机构
代理人
主权项
地址
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