发明名称 DERUTAHENCHOSARETASHINDENZUHANOTENKANTENKEITAIORYOSURUFUSEIMYAKUKENSHUTSUKI
摘要 An arrhythmia detector includes a delta modulator which digitizes the ECG signal and produces a serial digital signal that represents the input ECG signal. A microprocessor classifies the signal as having no slope, positive slope, or negative slope. A finite state machine model in the microprocessor uses the positive slope, negative slope, or no slope information to determine the number of times an isoelectric line segment is present in the ECG signal. By accumulating the line-counts or number of line segments over a two-second period, a determination can be made whether the ECG signal has been in isoelectric line less than a threshold. For two out of three 2 second periods, if the percentage of isoelectric time is less than the ventricular fibrillation threshold then a ventricular fibrillation signal can be generated. For ventricular tachycardia verses supraventricular tachycardia discrimination, a second threshold which relates to the average heart rate observed in a linear formula LC(TH) = b - a*(rate)/30 can be used. If the isoelectric line-count is less than the LC(TH), then VT is declared. The regression coefficient a and b can be found by measuring the line-count and rate pairs in 2 second periods during normal sinus rhythm in periodic basis, for example, 10 data pairs every hour. The delta modulator uses a comparator which receives the ECG signal and a tracking signal to output a series of binary digits. A digital-to-analog converter generates the tracking signal. <IMAGE>
申请公布号 JP2648543(B2) 申请公布日期 1997.09.03
申请号 JP19920185127 申请日期 1992.07.13
申请人 KAADEIATSUKU PEESUMEEKAAZU INC 发明人 JINCHUI FUSAN
分类号 A61B5/0452;A61B5/044;A61B5/046;A61B5/0464;A61B5/0468;A61N1/37;G06F17/00 主分类号 A61B5/0452
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