发明名称 HOSOHOSHIKIHANBETSUSOCHI
摘要 PURPOSE:To precisely discriminate a broadcasting system with simple constitution by measuring only the cycle of a vertical synchronizing signal with the aid of using a reference clock signal and discriminating the broadcasting system of an NTSC/PAL system based on the cycle and a threshold value. CONSTITUTION:When the VSS signal is inputted from an input terminal 3, a flag is set to a flag register 4 and simultaneously to that, the count value COURT 1 of a round type counter 2 at that time is fetched by a latch circuit 5. After obtaining the cycle of the VSS signal by using a computer element 9, the data being the COUNT 1 of the latch circuit 6 is stored in the address of the COUNT zero of an RAM 7 and held until a next signal is inputted. The average value of the count value of the counter 2 corresponding to the reference cycle of the VSS signal is stored in an ROM 8 as the threshold value (the THR) for the discrimination of the broadcasting system. When the cycle of the VSS signal obtained by the computer element 9 is over the THR, the broadcasting system is decided as a PAL mode.
申请公布号 JP2650291(B2) 申请公布日期 1997.09.03
申请号 JP19880008725 申请日期 1988.01.19
申请人 MATSUSHITA DENKI SANGYO KK 发明人 KUNIHIRA TADASHI;MIZUGUCHI HIROSHI
分类号 H04N11/00;G11B20/02;H04N7/00;H04N9/80;H04N11/24 主分类号 H04N11/00
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