| 摘要 |
A ferroelectric memory comprised of a word line; a read bit line; a plate line; a memory array comprised of a matrix arrangement of memory cells with gate electrodes connected to the word line, one of the source-drain electrodes connected to the read bit line, the other of the source-drain electrodes connected to one of the electrodes of a ferroelectric capacitor, and the other of the electrodes of the ferroelectric capacitor connected to the plate line; a first reference cell and a second reference cell corresponding to each of the read cells in a word line selected at the time of reading data, read out in comparison with each other, and storing data different in value from each other; a first sense amplifier for comparing and amplifying a difference in potential between the read bit line and a first reference bit line to which the first reference cell is connected for each read bit line to which a read cell is connected; and a second sense amplifier for comparing and amplifying a difference in potential between the read bit line and a second reference bit line to which the second reference cell is connected.
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