发明名称 NULL convention logic system
摘要 A Null convention logic system for processing NULL convention signals is comprised of interconnected processing elements. NULL convention signals can assume at least a first meaningful value indicating data and a NULL value which has no data significance. Processing elements receive a plurality of NULL convention signals and produce a meaningful output data value when the number of meaningful input data values exceeds a threshold number. The gates assert a NULL output when all inputs are in the NULL state. Processing elements exhibit hysteresis such that, as the number of meaningful input values falls below the threshold number, the element holds a meaningful output value (or a non-data non-NULL value) until all inputs are in the NULL state. The threshold number may be less than the total number of inputs. Groups of elements may be interconnected, and thresholds selected, to perform logic and other processing functions asynchronously on meaningful signal values.
申请公布号 US5664212(A) 申请公布日期 1997.09.02
申请号 US19940220636 申请日期 1994.03.31
申请人 THESEUS RESEARCH, INC. 发明人 FANT, KARL M.;BRANDT, SCOTT A.
分类号 G06F7/00;G06F7/50;G06F7/505;G06F11/08;H03K19/08;H03K19/096;H03K19/23;H03M5/02;H03M5/16;(IPC1-7):G06F1/00 主分类号 G06F7/00
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