发明名称 FAULT TOLERANT, SELF-DIAGNOSING AND FAIL-SAFE LOGIC CIRCUITS AND METHODS TO DESIGN SUCH CIRCUITS
摘要 Combinational logic circuit and method for designing such a circuit such that any time it has to change a starting state vector (X1) into an end state vector (X2) via transition state vectors (XTi) the combinational logic circuit tries to change a predetermined number of predetermined individual bits for any current state vector on the route to the end state vector (the number being at least 1 higher than the number of allowed static bit errors in the state vector), as long as the Hamming distance between the current state vector and the end state vector so allows and if not, the combinational circuit tries to change the current state vector into the end state vector.
申请公布号 WO9731314(A1) 申请公布日期 1997.08.28
申请号 WO1997NL00080 申请日期 1997.02.21
申请人 SIMTECH BEHEER B.V.;VAN DER MEULEN, MEINE, JOCHUM, PETER 发明人 VAN DER MEULEN, MEINE, JOCHUM, PETER
分类号 G06F11/00;G06F11/08 主分类号 G06F11/00
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