Simple layout low power data line sense amplifier design

摘要

A data-line sense amplifier circuit for the sensing, amplifying and writing of digital data to and from a set of I/O lines from a bit line sense amplifying circuit is described. The data-line sense amplifier has a differential amplifier that is connected to positive and a negative primary data lines of the bit line sense amplifier. The change in the voltage in the positive and negative primary data lines is amplified and transferred to a positive and a negative output data lines. The data line sense amplifier has a writing means to transfer digital data that is present on the positive and negative output data lines to the positive and negative primary data lines. Multiple data line sense amplifiers may be cascaded between the bit line sense amplifying circuit and the input/output lines. A positive and negative timing control signal selectively activates and deactivates said differential amplifier for the low consumption of power. A write control signal controls the coupling of the positive and negative output data lines to the positive and negative primary data lines for the writing of digital data.