发明名称 |
Positive feedback circuit for fast domino logic |
摘要 |
A logic circuit is described. The logic circuit generates a first signal state in response to a first set of input signals, generates a second signal state in response to a second set of input signals, activates a bypass switch in response to the first signal state, and bypasses a domino logic unit in response to the first signal state.
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申请公布号 |
US5661675(A) |
申请公布日期 |
1997.08.26 |
申请号 |
US19950414908 |
申请日期 |
1995.03.31 |
申请人 |
INTEL CORPORATION |
发明人 |
CHIN, KAI J.;KUMAR, SUDARSHAN |
分类号 |
G06F7/50;G06F7/508;H03K19/096;(IPC1-7):G06F7/50;H03K17/80 |
主分类号 |
G06F7/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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