| 摘要 |
<p>An 'N' channel receiver system (100) includes 'N' A/D converters (103a-103b), one per channel, sampling the data received by their respective channels. The sampling rate of the A/D converters (103a-103b) is controlled by a sampling clock signal (104) generated by a timing recovery circuit (107). One rate of the sampling clock is a function of a timing signal (160) applied to the timing recovery circuit (107). The band edge filters (113a-113b) are coupled to each channel of the receiver for producing N distinct timing signals (TSa-TSb) corresponding to the data signals received by each one of the N channels. The N distinct timing signal (TSa-TSb) are coupled to a channel selector (155) for selectively coupling one of the N distinct timing signals having highest SNR to the timing recovery circuit.</p> |
