发明名称 DENGENSOCHI
摘要 PURPOSE:To produce a plurality of high voltage outputs having different output timing from a single transformer by arranging an output control element and a voltage doubler/rectifier at the secondary of a booster transformer and lapping an AC voltage produced through the output control element at a control point over the output from the voltage doubler/rectifier. CONSTITUTION:During an interval when a transistor Q3 is turned OFF, a capacitor C9 is charged only and voltage doubling/rectifying operation is not carried out thus producing no DC component at terminal J2. When the transistor Q3 is controlled into conducting state, clamping operation is carried out through a clamper comprising a capacitor C8, the transistor Q3 and a diode d2, and the collector has a DC level shifted output. This AC signal is rectified and lapped over the output from a booster transformer T1 through a capacitor C7 for voltage regulation and DC cut, thus producing a DC output at the anode of a diode D9. By such arrangement, the size and the weight of the power source section are reduced resulting in cost reduction.
申请公布号 JP2643308(B2) 申请公布日期 1997.08.20
申请号 JP19880134304 申请日期 1988.06.02
申请人 KYANON KK 发明人 SUZUKI KOJI
分类号 G03G21/00;G03G15/00;H02J3/02 主分类号 G03G21/00
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