发明名称 |
Method for fabricating a stack of two dimensional circuit modules |
摘要 |
A method for fabricating a stack of circuit modules includes providing a plurality of substrates having module interconnection layers. Each of the substrates has a circuit chip with chip pads positioned therein and an electrically conductive feed-through line extending from a first surface of the substrate to a second surface of the substrate with the first surface being perpendicular to the second surface. Each of the module interconnection layers is situated over a respective first surface of each of the substrates and includes a module dielectric layer having module vias therein and a module pattern of electrical conductors extending through the module vias to couple the selected chip pads to the feed-through line. The plurality of substrates are stacked. A side interconnection layer is applied over a side surface including the second surfaces of the substrates. The side interconnection layer includes a side dielectric layer having side vias therein aligned with predetermined ones of the feed-through lines and a side pattern of electrical conductors extending through the side vias. |
申请公布号 |
US5657537(A) |
申请公布日期 |
1997.08.19 |
申请号 |
US19950453109 |
申请日期 |
1995.05.30 |
申请人 |
GENERAL ELECTRIC COMPANY |
发明人 |
SAIA, RICHARD JOSEPH;GOROWITZ, BERNARD;DUROCHER, KEVIN MATTHEW |
分类号 |
H01L21/98;H01L23/538;H01L25/065;H05K1/03;H05K1/14;H05K3/40;H05K3/46;(IPC1-7):H05K3/36 |
主分类号 |
H01L21/98 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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