| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a semiconductor memory capable of a high speed read-out operation by reducing capacitances of bit lines and capable of the coincidence of an electric characteristic with a mask ROM having the same constitution in an electrically writable nonvolatile semiconductor memory. SOLUTION: A bit line 12 is connected to a nonvolatile memory cell 16 and a read circuit 4 and a write control circuit 3 are connected to one end of the bit line 12 via a column gate 2 and a write voltage impressing circuit 7 is connected to the other end. Data outputted from the write control circuit 3 raises the bit line 12 selected by the column gate 2 to a high level. The write voltage impressing circuit 7 receives this level to raise the bit line 12 till a write voltage VPP and performs the writing of the memory cel 16. Since the column gate 2 can be constituted of transistors being resistance to a breakdown strength VCC, the high speed read-out operation is made possible and also the electric characteristic difference with the mask ROM having the same constitution can be eliminated.</p> |
