| 摘要 |
PROBLEM TO BE SOLVED: To attain a PLL with a sampler even with a poor linearity of a broad band oscillator or a large frequency fluctuation by conducting pre-tuning again. SOLUTION: Let an output frequency of a YTO 10 be 4-8GHz and let a frequency dividing ratio of a frequency divider 130 be 1/4, then an output of the frequency divider 130 is 1 to 2GHz. In the case of locking the YTO 10 to, e.g. 8GHz, at first switches 120, 80 are opened to apply rough pre-tuning to the YTO 10 around 8GHz without forming 1st and 2nd PLL circuits. Then the switch 80 is closed to set an S/H circuit 100 to be a sampling state and a comparison frequency of 1MHz is set and a frequency divider 150 is set to N=2000, just after the 2nd PLL circuit is formed, the circuit 100 is set to a holding state to allow the circuit 100 to hold the lock voltage. The YTO 10 is pre-tuned again with high accuracy to 8GHz by the lock voltage. Thus, the switch 120 is closed to form the 1st sampler PLL circuit so as to allow the PLL circuit to be surely set up. |
