发明名称 PARALLEL PROCESSOR
摘要 <p>A parallel processor formed in each network node, comprising a network interface controller which controls the communication with the network. The interface controller comprises a message receiver which, in response to a message from another node, discriminates the receiving state of the message, necessity of returning an ACK message, etc.; an ACK generator which generates an ACK request based on prescribed information in the message and the receiving state of the message when the ACK message must be returned; and a message transmitter which generates and returns the ACK message upon receiving the ACK message request. When such a constitution is used, the network interface controller can return the ACK message and, as compared with the case where a processor returns the ACK message, not only the overhead can be reduced, but also the time required for returning the message can be shortened on the receiving side. Even when a message cannot be received normally, in addition, an ACK message can be returned.</p>
申请公布号 WO9729435(A1) 申请公布日期 1997.08.14
申请号 WO1996JP00284 申请日期 1996.02.09
申请人 HITACHI, LTD.;MAEDA, HIROMITSU;HAMILTON, PATRICK 发明人 MAEDA, HIROMITSU;HAMILTON, PATRICK
分类号 H04L1/16;H04L1/18;H04L29/06;(IPC1-7):G06F15/16 主分类号 H04L1/16
代理机构 代理人
主权项
地址