发明名称 YOMIDASHISENYOHANDOTAIKIOKUSOCHI
摘要 PURPOSE:To provide a ROM having a small occupying area. CONSTITUTION:A ROM memory cell MC has a memory cell transistor 1 and a plurality of reference potential transmission lines 4, 5a, 5b. Storage information of the cell MC is determined according to the connecting state of a source terminal of the transistor to the transmission line. A reference potential is transmitted from a reference potential generator 50 to the lines 4, 5a, 5b. The transmission lines are disposed in parallel with a bit line 3. Accordingly, data stored in the cell MC can be altered by varying the potentials of the lines 4a, 5a, 5b, a plurality of address data can be stored in one memory cell thereby to reduce the number of ROM cells, thereby obtaining a ROM having a small occupying area. The bit line 3 and the lines 4a, 5a, 5b are disposed in parallel to charge/discharge a current to the transmission lines through the cells, and hence variation in the potential of the transmission line can be prevented, thereby rapidly and effectively reading data.
申请公布号 JP2640184(B2) 申请公布日期 1997.08.13
申请号 JP19910198001 申请日期 1991.08.07
申请人 MITSUBISHI DENKI KK 发明人 URAMOTO SHINICHI;MATSUMURA TETSUYA;YOSHIMOTO MASAHIKO;ISHIHARA KAZUYA
分类号 G11C17/12;H01L21/8246;H01L27/112 主分类号 G11C17/12
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