| 摘要 |
<p>PURPOSE:To obtain an address decoder which can cope with mass capacity by equalizing the time constant of a time constant circuit forming of a diffused resistor and parasitic capacity to an address determined time. CONSTITUTION:Charge in parasitic capacitor C of wiring and a load is discharged through a diffused resistor R in the common source area of first parallel channel MOSFETs 210 to 21n/2, and the other charge is discharged through the diffused resistor R in the common source area of a second parallel P channel MOSFETs 21n/2+1 to 21n. Consequently although the address determined time of one word line is extended due to the addition of the diffused resistor, for the other word line, since the diffused resistor of the common source area is reduced by half, the address is determined approximately in a half time which is equivalent to the former time. Thus the increase of the address signal lines for the mass capacity can be coped with.</p> |
