发明名称 Method and apparatus for batchable frame switch and synchronization operations
摘要 A system and method that avoids performance bottlenecks at the host processor while avoiding tearing of the displayed image. In one embodiment, the system is composed of the host processor, a first in first out (FIFO) buffer, a co-processor, multiple frame buffers, a display controller and a display. The host and the co-processor are configured to enable the host to selectively batch graphic commands to the co-processor. The small set of commands provides the flexibility to selectively batch commands and selectively synchronize the host processor to the co-processor.
申请公布号 US5657478(A) 申请公布日期 1997.08.12
申请号 US19960648680 申请日期 1996.05.16
申请人 RENDITION, INC. 发明人 RECKER, JOHN;DONOVAN, WALTER
分类号 G09G5/393;G09G5/399;(IPC1-7):G06F15/16 主分类号 G09G5/393
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