Hardware filter circuit and address circuitry for MPEG encoded data
摘要
A data processing system (10) uses a microprocessor host (12) coupled to a decoding system (14). A hardware filter arithmetic unit block (32) retrieves decoded information from the arithmetic unit buffer (30) and dequantizes, transforms and filters the data to generate PCM output data which is loaded into a PCM buffer (34). An address circuit forms several addresses from a single value to accesses multiple sources of data and coefficients simultaneously for use by the hardware filter arithmetic unit.
申请公布号
US5657423(A)
申请公布日期
1997.08.12
申请号
US19930054768
申请日期
1993.04.26
申请人
TEXAS INSTRUMENTS INCORPORATED
发明人
BENBASSAT, GERARD;LACZKO, SR., FRANK L.;LI, STEPHEN H.;CYR, KENNETH R.;ROWLANDS, JONATHAN L.