发明名称 Display apparatus interface
摘要 <p>A display system comprises a digital video source coupled to a digital display device via an digital interface having a timing channel for carrying a pixel clock signal from the video source to the display device and a digital video channel for carrying a digital video bit stream from the video source to the display device. The video source comprises a pixel clock generator for generating the pixel clock signal, palette logic for outputting a pixel word on each pulse of the pixel clock signal, shift clock logic for multiplying the pixel clock signal by the number of bits in the pixel word to produce a shift clock signal, and serialiser logic for serially outputting the pixel word in the serial bit stream at the shift clock signal rate. The display device comprises a display screen for producing a pixel of an image in response to the pixel word; shift clock generator logic for multiplying the pixel clock signal by the number of bits in the pixel word, and deserialiser logic for receiving the input video bit stream at the shift clock signal rate to re-generate the pixel word from the video bit stream. &lt;IMAGE&gt;</p>
申请公布号 EP0788048(A1) 申请公布日期 1997.08.06
申请号 EP19970300289 申请日期 1997.01.17
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 PIETRZAK, CHRISTOPHER CARLO;KNOX, ANDREW
分类号 G09G5/00;G09G5/02;G09G5/04;G09G5/06;G09G5/18;(IPC1-7):G06F3/14 主分类号 G09G5/00
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