| 摘要 |
PROBLEM TO BE SOLVED: To reduce the detecting time of a sticky bit and to execute floating point addition/subtraction at high speed by indicating that the sticky bit exists when the right shift quantity of a mantissa part for digit-arranging in an index part. SOLUTION: When the index part of first operand is larger, for example, in a comparison subtracting circuit 10, a comparing signal 11 becomes '1' by the comparison of the index parts, the index part of the second operand is subtracted from the index part of the first operand and a subtraction result is outputted to a shift circuit 30 as a shift quantity signal 12. Then, LZC(leading zero counting) circuit 50 executes a leading zero processing for counting the continuous number of guard bits G from the lowest bit of the mantissa part of the second operand by the '1' of the comparing signal 11 and outputs a leading zero quantity signal 13 is outputted to a comparing circuit 51. Moreover, the comparing circuit 51 executes the comparison processing of the leading zero quantity signal 13 with the shift quantity signal 12 so as to output a comparison result to an absolute value adding/subtracting circuit 60 as the sticky bit S. |
