发明名称 TRANSMITTER
摘要 PROBLEM TO BE SOLVED: To prevent erroneous VCO control from being performed even in the case that the interval of extracting SCR information is shorter than the arithmetic processing time of the difference of an STC counter value and the SCR information and to provide stable clocks. SOLUTION: An SCR extraction suppression circuit 20 for suppressing the extraction of the SCR information for a fixed time is provided and control is performed so as not to make a difference detector 5-4 start an arithmetic processing by the new SCR information even at the time of receiving a program stream 7 including the SCR information during the arithmetic processing. The SCR extraction suppression circuit 20 realizes normal VCO control even in the case that the extraction interval of the SCR information is shorter than the arithmetic processing time by inhibiting the extraction of the SCR information during the arithmetic processing.
申请公布号 JPH09205417(A) 申请公布日期 1997.08.05
申请号 JP19960011095 申请日期 1996.01.25
申请人 HITACHI DENSHI LTD 发明人 KOTO HARUHIRO
分类号 H04N5/92;H04L7/02;H04N1/41;H04N7/08;H04N7/081;H04N7/24;H04N19/00;H04N19/423;H04N19/44;H04N19/70;H04N19/80 主分类号 H04N5/92
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