发明名称 SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION OF COMPUTER SYSTEM
摘要 <p>PROBLEM TO BE SOLVED: To reduce the power consumption of a computer system, especially, of a notebook type computer system. SOLUTION: This system is provided with a programmable frequency oscillator 12 for changing the current operating frequency and operating voltage of a microprocessor 14 at a computer suitably for a current operating state and a programmable power source 18. When the microprocessor 14 does not perform an operation having any meaning, the programmable frequency oscillator 12 and the programmable power source 18 can reduce both the operating frequency and the operating voltage so that the power consumption of the computer system can be reduced based on the expression of power = voltage<2>×frequency. The programmable frequency oscillator 12 and the programmable power source 18 can be fitted to another system component in the computer system to consume massive power of the computer system.</p>
申请公布号 JPH09204242(A) 申请公布日期 1997.08.05
申请号 JP19960233785 申请日期 1996.09.04
申请人 V LSI TECHNOL INC 发明人 DEIBITSUDO AARU EBOI
分类号 G06F1/26;G06F1/04;G06F1/32;(IPC1-7):G06F1/32 主分类号 G06F1/26
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