发明名称 DMA controller having a plurality of DMA channels each having multiple register sets storing different information controlling respective data transfer
摘要 A direct memory access (DMA) controller is connected with the CPU bus of a computer system through a bus interface and also to an I/O bus, which is connectable to one or more I/O controllers. The DMA controller contains multiple channels, each corresponding to a particular I/O controller, which are coupled to both the bus interface and the I/O bus. Each of the channels contains at least one register set storing information for the transfer and a data buffer holding the data during a transfer between the I/O bus and the CPU bus.
申请公布号 US5655151(A) 申请公布日期 1997.08.05
申请号 US19940189132 申请日期 1994.01.28
申请人 APPLE COMPUTER, INC. 发明人 BOWES, MICHAEL J.;CHILDERS, BRIAN A.
分类号 G06F13/28;(IPC1-7):G06F13/00 主分类号 G06F13/28
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