发明名称 THREE-INPUT FLOATING POINT ADDER
摘要 PROBLEM TO BE SOLVED: To simultaneously execute the simultaneous floating point addition of three operands and to execute a rounding processing by permitting zero with more than one bit to be between a rounding bit and a sticky bit. SOLUTION: When two operands are respectively digit-arranged to the other operand having a max. index part within the three, a digit arranging means 15 provides the bit for containing the carry of the sticky bits with the probability of occurrence at the time of addition so as to transmit a carry result. An adding means 25 inputs a digit arranging result, executes absolute value addition and transmits an addition intermediate result. Then, a normalizing means 30 inputs the addition intermediate result so as to normalize it and transmits the intermediate result where the logical sum of the whole low-order bits and sticky bits under the rounding bit adding the carry of the sticky bits is adopted as the new sticky bit. Moreover, a rounding means 40 inputs the intermediate result, executes the rounding processing in accordance with a designated rounding mode and transmits an arithmetic result.
申请公布号 JPH09204294(A) 申请公布日期 1997.08.05
申请号 JP19960012658 申请日期 1996.01.29
申请人 KOFU NIPPON DENKI KK 发明人 KAWAGUCHI TADAHARU
分类号 G06F7/38;G06F7/00;G06F7/483;G06F7/50;G06F7/509;G06F7/76 主分类号 G06F7/38
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