| 摘要 |
PCT No. PCT/DE94/00483 Sec. 371 Date Nov. 7, 1995 Sec. 102(e) Date Nov. 7, 1995 PCT Filed May 2, 1994 PCT Pub. No. WO94/27319 PCT Pub. Date Nov. 24, 1994In a power semiconductor component a ceramic substrate (SUB) and a metallic baseplate (BP) are connected, in order, via a connecting layer (2), a buffer layer (DP) made of a material having a low yield point and high thermal conductivity as well as a further connecting layer (3). The mechanical connections between the ceramic substrate and the baseplate have a high shear strength. Premature material fatigue and cracking on account of the different thermal expansion of the ceramic substrate and the baseplate are avoided by means of plastic deformation of the buffer layer. Connecting layers are, for example, sintered silver powder layers such as are advantageously used in the low-temperature connection technique for power semiconductor components.
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