| 摘要 |
A flash EEPROM, wherein provision is made of an auxiliary bit portion connecting nonvolatile memories in parallel with bit lines of a memory array portion and a spare row decoder for controlling addresses of a redundant memory portion, which records the cumulative number of cycles of rewriting and erasure for each word line in the nonvolatile memories, judges from the stored cumulative number of cycles if the number of cycles of a sector has reached a limit value, and, when reaching it, replaces the word line with a redundant word line so as to prolong the life of the memory even when the cumulative number of cycles of a specific word line has reached a limit value and which stores the data in accordance with different phases when the number of the data "1" or "0" is greater than or less than a predetermined number at the time of writing data and fetches the stored information based on the phase information at the time of reading data so as to reduce the drain disturbances. |
