发明名称 Verwerkingsstelsel voor het verwerken van digitale data.
摘要 Described is a digital signal processor including at least two memories, that is, a microprogram memory for storing a series of microinstructions for instructing a digital signal processing procedure, and a coefficient memory for storing coefficient data required for performing a series of arithmetic operations on the digital signal data. These data being transferred and written into said microprogram memory and said coefficient memory from a host computer system. The coefficient memory has at least two pages corresponding to the total memory area which may be addressed during digital signal processing to be effected by said microinstructions. Page selection of the coefficient memory may be performed from said host computer system.
申请公布号 NL192698(B) 申请公布日期 1997.08.01
申请号 NL19830000387 申请日期 1983.02.02
申请人 SONY CORPORATION (SONY KABUSHIKI KAISHA) 发明人
分类号 G06F7/00;G06F9/00;G06F9/06;G06F9/22;G06F9/24;G06F9/38;G06F17/14;G06F17/15;H03H17/02 主分类号 G06F7/00
代理机构 代理人
主权项
地址