发明名称 Current reference device providing stable timing for integrated memory circuit
摘要 The current reference device has a reference resistor (Rr) and two MOS transistors of the same conductivity type. The first transistor (T1) has gate and drain connected together at one terminal (A) of the reference resistor, and the second transistor (T2) has gate and drain connected together at the other terminal (B) of the reference resistor. The first transistor has a threshold voltage greater than the second transistor and the source of each of the transistors is connected to the same potential as the circuit substrate. A third transistor (T3), also with gate and drain connected, has a higher threshold potential than the first transistor, and is connected to it to provide a current proportional to the difference in threshold potentials.
申请公布号 FR2744262(A1) 申请公布日期 1997.08.01
申请号 FR19960001168 申请日期 1996.01.31
申请人 SGS THOMSON MICROELECTRONICS SA 发明人 TAILLIET FRANCOIS
分类号 G05F3/26;(IPC1-7):G05F3/26 主分类号 G05F3/26
代理机构 代理人
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