| 摘要 |
PROBLEM TO BE SOLVED: To suppress the increase in the resistance of a wiring layer by suppressing the diffusion of an impurity from a flattening insulation film in a contact hole to the wiring layer. SOLUTION: A polycrystalline Si layer 54 is machined to the pattern of the gate electrode of a thin-film transistor at a memory cell array part 32 and is machined to a pattern connected to a P<+> diffusion layer 44 via a contact hole 53 at a surrounding circuit part 33. Then, after SiO2 film 55 as a gate oxide film is deposited, oxidation is made at a low temperature, thus fojming a thin SiO2 film 74 from the polycrystalline Si layer 54 on the inner side surface of the contact hole 53 and suppressing the diffusion of phosphor to the polycrystalline Si layer 54 from BPSG film 47. |
