发明名称 |
DYNAMIC RAM IN A MICROPROCESSOR SYSTEM |
摘要 |
A microprocessor has RAS and CAS outputs for exclusive coupling, via a bus, to RAS and CAS inputs of a private DRAM. The microprocessor has a DRAM Control Register having at least one bit which is set to designate whether the DRAM is private to the microprocessor, a read circuit which reads the one bit and determines whether the bit is set, and a control logic circuit coupled to the read circuit for controlling functions of the microprocessor according to whether the DRAM is private to it. |
申请公布号 |
WO9727547(A2) |
申请公布日期 |
1997.07.31 |
申请号 |
WO1996IB01499 |
申请日期 |
1996.12.20 |
申请人 |
MOTOROLA ISRAEL LIMITED;GALANTI, DAVID;ZMORA, EITAN;GOREN, AVNER |
发明人 |
GALANTI, DAVID;ZMORA, EITAN;GOREN, AVNER |
分类号 |
G06F12/00;G06F12/02 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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