TIMING CONTROL CIRCUIT

摘要

PROBLEM TO BE SOLVED: To change access timing to a peripheral circuit based on the frequency of an operation clock and to suppress the increase of power consumption in the peripheral circuit, which is caused by means of the decrease of the operation clock frequency. SOLUTION: A timing generation part 200 generates the plural kinds of control signals different in timing for the supplied operation clock CTL in timing generation circuit 10-13. A clock scaling detection circuit 106 detects the speed of the supplied operation clock CTTL. Selectors 201 and 202 select one of the control signals generated in the timing generation part 200 with the control signals 111 and 112 outputted in accordance with the detected speed of the operation clock CTL. The selected control signal is supplied to ROM as chip selection CS and an output enable OE signal and becomes the control signal for accessing to ROM.